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您现在的位置: 蓉城信息港 >> 人才市场 >> 名企招聘 >> 人才信息正文 |
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| 今日四川长虹电器股份有限公司招聘
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| 作者:未知 人才信息来源:本站原创 进入成都论坛交流 更新时间:2005-6-16 | ||||
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公司/单位: 四川长虹电器股份有限公司 Skills and Qualifications: MSEE Required; PhDEE preferred Have 2+ years experience of simulating a system embedded with multi-cores and must have complete knowledge of verifying a system with multiple embedded DSP cores. Have excellent knowledge of various DSP algorithms, especially multimedia signal processing algorithms. In-depth knowledge in recent advancement in audio and video compression techniques. Experience in ADPCM, AAC, AMR, H. 263, H. 264, and MPEG4 AVC and is a plus. Have experience in estimating computation power needed for various algorithms and controls. Experience in developing and implementing DSP algorithms according to particular DSP structures. Have excellent knowledge of various DSP cores especially ARM, embedded software development, real time algorithm implementation, parallel algorithm design, multimedia protocol and standard especially MPEG 1/2/3/4, and various DSP algorithms. Be familiar with various tools such as Matlab, C++, Perl, C-shell, and ARM developing and application tools. Knowledge on IP phone, IP TV, video telephone, high speed wireless access technology, personal multimedia center, other major DSP cores, various signal interface standards, communication and network protocols, and hardware will be a plus. Hand-on experience in designing and implementing multimedia processing algorithms with embedded multi-cores is a big plus. Be familiar with various DSP developing tools and equipments. Skills and Qualifications: BSEE required; MSEE preferred. Be familiar with various Altera FPGAs, Altera FPGA developing tools, signal generator, and logical analyzer. Have complete knowledge of the design flow for developing both FPGA and ASIC. Be familiar with various Synopsys tools such as Design Compiler, Design Analyzer, DesignWare, Formality, Leda, System Studio, Magellan, Vera, Vcs, and Synopsys Simulator. Experience in writing a complex script with dc-shell and experience in using Power Compiler are a big plus. 3+ years experience in one of hardware description languages with Verilog-XL preferred, gate level optimum, synthesis, layout, placing and routing, and verification. Should be familiar with at least one of Verilog simulators such as Modelsim, Verilog-XL, NC Verilog, Finsim, Smash, Icarus, and Verilator. Experience in mixed-signal IC design, architecture design, testing vector generation, function integration and verification, RTL level system integration and verification, mega-module integration, and system on chip architecture is a plus. Experience in verifying FPGA with embedded DSP cores is a plus. Experience in verifying FPGA for audio and video signal processing is a plus. Knowledge of hardware and circuit-board is a plus. Knowledge of C, CShell, and Perl is a plus. Skills and Qualifications: BSCS or BSEE Required. MSCS or MSEE Preferred 3+ years experience in designing and programming software for testing FPGAs and ASICs on a PC or Linux or Unix based platform. 5+ years experience in C++, Visual Basic, Visual C++, Perl, Java, CShell, Shell, application programming interfaces, objective oriented programming, and graphic interface application. Have experience in real time software and parallel software development. Have solid knowledge in various data structures and algorithms built on corresponding data structures. Have complete knowledge on software developing methodology. Knowledge of DSP implementation, ASIC design flow, FPGA testing equipment, and hardware is a plus. Be familiar with operation systems Linux, Windows, Unix Be familiar with peripheral devices, PC ports, memory devices, communication protocols, and network protocols. Knowledge of computer network administration is a plus. Knowledge of various DSP algorithms is a plus. Skills and Qualifications: MSEE Required; PhDEE preferred Be familiar with multimedia signal processing, television theory, and digital television. 3+ years experience in performance analysis, systems simulation, algorithm development, architecture definition, testing procedure generation, and system integration. Have complete knowledge of designing and verifying a system with embedded multi-cores. Be familiar with various embedded DSP cores, micro-controllers, and CPU structures. Hand-on experience in designing multimedia processing system with embedded multi-cores is a huge plus. Be familiar with audio and video encoder and decoder algorithms and other major DSP algorithms. Have profound knowledge of various audio and video standards and various protocols such as MPEG 1/2/3/4 standards. Knowledge on DSP algorithm implementations especially on the implementation of audio and video encoder and decoder is a plus. Be familiar with ASIC developing flow. Knowledge of Verilog code, synthesis, and verification is a plus. Have experience in converting customer specifications into a system design specification and further developing to commercial product. The experience in designing multimedia signal processing system is a plus. Have experience in using SPW, C/C++, Workshop, Verilog, CShell, Perl, multi-core simulation tools. Excellent oral and writing communication skills are a must.
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